Patterns to be formed on semiconductor devices are laid out closer to each other as the size of the semiconductor devices decreases. This may cause interference of light during exposure, which is a step in a process of manufacturing semiconductor devices, and may prevent intended patterns from being formed.
To avoid this, target patterns may be formed by using two masks in two steps (double patterning or double exposure). This technique enables high-resolution patterns to be formed even using an exposure apparatus with a long wavelength since the patterns are formed with a relatively large pitch in each exposure step using the corresponding mask (see, for example, International Publication Pamphlet No. WO 2005/041301 and Japanese Laid-open Patent Publication Nos. 2010-129895 and 2001-168197).
However, patterns formed in the first step and those formed in the second step may vary (for example, in the entire wafers or chips) since target patterns are formed using two masks in two steps in the double patterning. This may lead to large variations in characteristics of transistors.